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Description: 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（1）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (1)
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Author: zhangxing |
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Description: 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（2）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (2)
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Size: 762880 |
Author: zhangxing |
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Description: 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（4）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (4)
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Size: 148480 |
Author: zhangxing |
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Description: 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（5）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (5)
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Size: 146432 |
Author: zhangxing |
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Description: signed_mult乘法器通常用于DSP设计。但由于赛灵思的FPGA架构中包含有-signed_mult multiplier is used DSP design. But Xilinx FPGA architecture contains
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Size: 7168 |
Author: ldy |
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Description: 这是DSP实现的无线冲击（IIR）滤波器的实现，用c语言编写，一调试通过-This is the wireless DSP shocks (IIR) filter achieved with c language, through a debugger
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Size: 52224 |
Author: 朱敬锋 |
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Description: FPGAs rise to meetincreasing DSP system
requirements-FPGAs rise to meetincreasing DSP system're quirements
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Size: 187392 |
Author: 黄名 |
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Description: 基于matlab和DSP的IIR/FIR 滤波器-Matlab and DSP-based IIR/FIR filter
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Size: 43008 |
Author: 张晓光 |
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Description:
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Size: 251904 |
Author: qjyong |
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Description: 非常经典的dsp书籍， 非常经典的dsp书籍！-dsp very classic books, the dsp very classic books!
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Size: 4799488 |
Author: 许风 |
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Description: 在FPGA系统设计中，要达到性能最大化需要平衡具有混合性能效率的元器件，包括逻辑构造(fabric)、片上存储器、DSP和I/O带宽。在本文中，我将向你解释怎样能在追求更高系统级性能的过程中受益于Xilinx® 的Virtex™ -5 FPGA构建模块，特别是新的ExpressFabric™ 技术。以针对逻辑和算术功能的量化预期性能改进为例，我将探究ExpressFabric架构的主要功能。基于实际客户设计的基准将说明Virtex-5ExpressFabric技术性能平均比前一代Virtex-4 FPGA要高30％。-in FPGA system design to achieve maximum performance with the need to balance the efficiency of the mixed performance components including logical structure (fabric), on-chip memory, DSP and I/O bandwidth. In this article, I will explain how you can in the pursuit of higher system-level performance of the process to benefit from Xilinx
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Size: 97280 |
Author: yaoming |
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Description: 在信息信号处理过程中，如对信号的过滤、检测、预测等，都要使用滤波器，数字滤波器是数字信号处理（DSP，DigitalSignalProcessing）中使用最广泛的一种器件。常用的滤波器有无限长单位脉冲响应（ⅡR）滤波器和有限长单位脉冲响应（FIR）滤波器两种[1]，其中，FIR滤波器能提供理想的线性相位响应，在整个频带上获得常数群时延从而得到零失真输出信号，同时它可以采用十分简单的算法实现，这两个优点使FIR滤波器成为明智的设计工程师的首选，在采用VHDL或VerilogHDL等硬件描述语言设计数字滤波器时，由于程序的编写往往不能达到良好优化而使滤波器性能表现一般。而采用调试好的IPCore需要向Altera公司购买。笔者采用了一种基于DSPBuilder的FPGA设计方法，使FIR滤波器设计较为简单易行，并能满足设计要求。-err
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Size: 96256 |
Author: yaoming |
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Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
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Size: 407552 |
Author: 刘斐 |
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Description: （1）设计一个直接型二阶低通数字滤波器。
（2）在DSP TMS320C5402上实现IIR滤波。
（3）对IIR滤波器各项指标进行评价
-(1) design a second direct-digital low-pass filter. (2) on the TMS320C5402 DSP IIR filter. (3) right IIR filter evaluation indicators
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Size: 3072 |
Author: 深蓝 |
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Description: 有关TI DSP c6000系列的C代码优化总结，对期数据打包、循环分解、内联函数的应用以及字节对齐等方面都有所介绍。-the TI DSP c6000 Series C code optimization summary view of data packing, recycling decomposition, Joint function within the application and byte alignment, and other aspects introduced.
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Size: 319488 |
Author: 周国华 |
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Description: JPEG静止图像压缩解压缩标准的硬件实现及其改进算法的研究 这是本人做图像压缩时收藏的一个比较经典的硕士论文，希望对大家有参考价值-JPEG still image compression decompression standard hardware and improved algorithm of this is my doing Image Compression collection of a more classic master's thesis, we hope to be a valuable reference
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Size: 2798592 |
Author: QHLee |
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Description: XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
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Size: 19456 |
Author: 朱效志 |
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Description: TMS320C6713的数字图像直方图统计程序，CCS开发环境。-TMS320C6713 digital image histogram statistical procedures, CCS development environment.
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Size: 52224 |
Author: 陈晓 |
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Description:
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Size: 382976 |
Author: 郑坤 |
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Description: FPGA和DSP的设计可靠性及可维护性对比.pdf-FPGA and DSP design reliability and maintainability contrast. Pdf
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Size: 398336 |
Author: bise |
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